基于FPGA的超高速FFT硬件实现

介绍了频域抽取基二快速傅里叶运算的基本原理；讨论了基于FPGA达4 096点的大点数超高速FFT硬件系统设计与实现方法，当多组大点数进行FFT运算时，利用FPGA内部大容量存储资源，采用乒乓结构进行流型运算，提高FFT运算速度，同时保证结果的准确性；对实际硬件进行了FFT运算测试，测试结果证明了系统的可行性和正确性，并且利用该硬件系统成功完成了星载SAR实时成像处理。In this paper, the basic principle of decimation-in-frequnency radix-2 FFT algorithm is briefly presented. Then, the design and realization methods of hardware system with FPGA are thoroughly discussed, with which it is easy to implement the FFT algorithm of large points－4 096 points. The FFT-speed of many groups of large points is accelerated greatly through ping-pong-ram. Finally, this hardware system is turned out to be feasible and accurate through the FFT algorithm experiment. Furthermore, the real-time imaging procession of airborne SAR can be accomplished successfully by this hardware system.