CD40174BC, CD40175BC英文资料 CMOS

The CD40174BC consists of six positive-edge triggered Dtype
flip-flops; the true outputs from each flip-flop are externally
available. The CD40175BC consists of four positiveedge
triggered D-type flip-flops; both the true and complement
outputs from each flip-flop are externally available.
All flip-flops are controlled by a common clock and a common
clear. Information at the D inputs meeting the set-up
time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. The clearing operation,
enabled by a negative pulse at Clear input, clears all
Q outputs to logical “0” and Q s (CD40175BC only) to logical
“1”.
All inputs are protected from static discharge by diode
clamps to VDD and VSS.

Features
Wide supply voltage range: 3V to 15V
High noise immunity: 0.45 VDD (typ.)
Low power TTL compatibility:
fan out of 2 driving 74L or 1 driving 74 LS
Equivalent to MC14174B, MC14175B
Equivalent to MM74C174, MM74C175