资料介绍
The LTC4307 hot swappable, 2-wire bus buffer allows
I/O card insertion into a live backplane without corruption
of the data and clock busses. The LTC4307 provides
bidirectional buffering, keeping the backplane and card
capacitances isolated. Low offset and high VOL tolerance
allows multiple devices to be cascaded on the clock and
data busses. If SDAOUT or SCLOUT are low for 30ms, the
LTC4307 will automatically break the bus connection. At
this time the LTC4307 automatically generates up to 16
clock pulses on SCLOUT in an attempt to free the bus. A
connection will resume if the stuck bus is cleared.
During insertion, the SDA and SCL lines are pre-charged
to 1V to minimize bus disturbances. When driven high,
the ENABLE input allows the LTC4307 to connect after a
stop bit or bus idle. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT.
READY is an open-drain output which indicates that the
backplane and card sides are connected.
I/O card insertion into a live backplane without corruption
of the data and clock busses. The LTC4307 provides
bidirectional buffering, keeping the backplane and card
capacitances isolated. Low offset and high VOL tolerance
allows multiple devices to be cascaded on the clock and
data busses. If SDAOUT or SCLOUT are low for 30ms, the
LTC4307 will automatically break the bus connection. At
this time the LTC4307 automatically generates up to 16
clock pulses on SCLOUT in an attempt to free the bus. A
connection will resume if the stuck bus is cleared.
During insertion, the SDA and SCL lines are pre-charged
to 1V to minimize bus disturbances. When driven high,
the ENABLE input allows the LTC4307 to connect after a
stop bit or bus idle. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT.
READY is an open-drain output which indicates that the
backplane and card sides are connected.
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