CYT2B95BAE无法使能SPI1的原因？

#include "SPI.h"
#include "cy_project.h"
#define SCB_CH_TO_BE_USED SCB0
//#define SCB_CLOCK PCLK_SCB0_CLOCK
#define SCB_INTERRUPT_NO scb_0_interrupt_IRQn
///* User setting value */
//#if (CY_USE_PSVP == 1)
// #define SOURCE_CLOCK_FRQ 24000000ul
//#else
// #define SOURCE_CLOCK_FRQ 80000000ul
//#endif
//#define SCB_SPI_BAUDRATE 1000000ul /* Please set baudrate value of SPI you want */
#define SCB_SPI_OVERSAMPLING 16ul /* Please set oversampling of SPI you want */
//#define SCB_SPI_CLOCK_FREQ (SCB_SPI_BAUDRATE * SCB_SPI_OVERSAMPLING)
#define DIVIDER_NO_1 (1u)
cy_stc_scb_spi_context_t contextSCB;
cy_stc_scb_spi_context_t contextSCB1;
static cy_stc_sysint_irq_t irq_cfg =
{
.sysIntsrc=SCB_INTERRUPT_NO,
.intIdx = CPUIntIdx3_IRQn,
.isEnabled = true,
};
static cy_stc_sysint_irq_t irq_cfg1 =
{
.sysIntsrc=scb_6_interrupt_IRQn,
.intIdx = CPUIntIdx4_IRQn, // ??
.isEnabled = true,
};
static const cy_stc_scb_spi_config_t SCB_SPI_cfg =
{
.spiMode = CY_SCB_SPI_MASTER, /*** Specifies the mode of operation ***/
.subMode = CY_SCB_SPI_MOTOROLA, /*** Specifies the submode of SPI operation ***/
.sclkMode = CY_SCB_SPI_CPHA0_CPOL0, /*** Clock is active low, data is changed on first edge ***/
.oversample = SCB_SPI_OVERSAMPLING, /*** SPI_CLOCK divided by SCB_SPI_OVERSAMPLING shoud be baudrate ***/
.rxDataWidth = 16, /*** The width of RX data (valid range 4-16). It must be the same as ref txDataWidth except in National sub-mode. ***/
.txDataWidth = 16, /*** The width of TX data (valid range 4-16). It must be the same as ref rxDataWidth except in National sub-mode. ***/
.enableMsbFirst = true, /*** Enables the hardware to shift out the data element MSB first, otherwise, LSB first ***/
.enableFreeRunSclk = false, /*** Enables the master to generate a continuous SCLK regardless of whether there is data to send ***/
.enableInputFilter = false, /*** Enables a digital 3-tap median filter to be applied to the input of the RX FIFO to filter glitches on the line. ***/
.enableMisoLateSample = true, /*** Enables the master to sample MISO line one half clock later to allow better timings. ***/
.enableTransferSeperation = true, /*** Enables the master to transmit each data element separated by a de-assertion of the slave select line (only applicable for the master mode) ***/
.ssPolarity0 = 0, /*** SS0: active low ***/
.ssPolarity1 = 0, /*** SS1: active low ***/
.ssPolarity2 = 0, /*** SS2: active low ***/
.ssPolarity3 = 0, /*** SS3: active low ***/
.enableWakeFromSleep = 0, /*** When set, the slave will wake the device when the slave select line becomes active. Note that not all SCBs support this mode. Consult the device datasheet to determine which SCBs support wake from deep sleep. ***/
// In case of using high level APIs, an user does not need to set these parameter. These parameter will be set in high level APIs such as "Cy_SCB_SPI_Transfer".
.txFifoTriggerLevel = 0, /*** When there are fewer entries in the TX FIFO, then at this level the TX trigger output goes high. This output can be connected to a DMA channel through a trigger mux. Also, it controls the ref CY_SCB_SPI_TX_TRIGGER interrupt source. ***/
.rxFifoTriggerLevel = 255, /*** When there are more entries in the RX FIFO, then at this level the RX trigger output goes high. This output can be connected to a DMA channel through a trigger mux. Also, it controls the ref CY_SCB_SPI_RX_TRIGGER interrupt source. ***/
.rxFifoIntEnableMask = 0, /*** Bits set in this mask will allow events to cause an interrupt ***/
.txFifoIntEnableMask = 0, /*** Bits set in this mask allow events to cause an interrupt ***/
.masterSlaveIntEnableMask = 0, /*** Bits set in this mask allow events to cause an interrupt ***/
.enableSpiDoneInterrupt = 0,
.enableSpiBusErrorInterrupt = 0,
};
//#define SPI_SCB_1
void irqSCB(void)
{
Cy_SCB_SPI_Interrupt(SCB_CH_TO_BE_USED,  contextSCB);
}
void irqSCB1(void)
{
Cy_SCB_SPI_Interrupt(SCB6,  contextSCB1);
}

void SPI_Init(void)
{
Cy_SCB_SPI_Init(SCB_CH_TO_BE_USED,  SCB_SPI_cfg,  contextSCB);
Cy_SCB_SPI_SetActiveSlaveSelect(SCB_CH_TO_BE_USED, 0);
Cy_SCB_SPI_Enable(SCB_CH_TO_BE_USED);
//#ifdef SPI_SCB_1
Cy_SCB_SPI_Init(SCB6,  SCB_SPI_cfg,  contextSCB1);
Cy_SCB_SPI_SetActiveSlaveSelect(SCB6, 0);
Cy_SCB_SPI_Enable(SCB6);
//#endif
}
void SPI_DeInit(void)
{
Cy_SCB_SPI_DeInit(SCB_CH_TO_BE_USED);
//#ifdef SPI_SCB_1
Cy_SCB_SPI_DeInit(SCB6);
//#endif
}

void SPI_EnableSCBIrq(void)
{
Cy_SysInt_InitIRQ( irq_cfg);
Cy_SysInt_SetSystemIrqVector(irq_cfg.sysIntSrc, irqSCB);
NVIC_EnableIRQ(irq_cfg.intIdx);
//#ifdef SPI_SCB_1
Cy_SysInt_InitIRQ( irq_cfg1);
Cy_SysInt_SetSystemIrqVector(irq_cfg1.sysIntSrc, irqSCB1);
NVIC_EnableIRQ(irq_cfg1.intIdx);
//#endif
}

void SPI_SendData(uint8_t lu8_SCBChannel, void *txBuf, uint32_t size)
{
uint32_t transferStatus = 0u;

if (lu8_SCBChannel == SPI_SBC_0)
{
Cy_SCB_SPI_Transfer(SCB_CH_TO_BE_USED, txBuf, NULL, size,  contextSCB);
do
{
transferStatus = Cy_SCB_SPI_GetTransferStatus(SCB_CH_TO_BE_USED,  contextSCB);
} while((transferStatus   CY_SCB_SPI_TRANSFER_ACTIVE) != 0u);
}
else if (lu8_SCBChannel == SPI_SBC_1)
{
//#ifdef SPI_SCB_1
Cy_SCB_SPI_Transfer(SCB6, txBuf, NULL, size,  contextSCB1);
do
{
transferStatus = Cy_SCB_SPI_GetTransferStatus(SCB6,  contextSCB1);
} while((transferStatus   CY_SCB_SPI_TRANSFER_ACTIVE) != 0u);
//#endif
}
else
{
// MISRA C
}
}
大佬们，请帮忙看看。初始化后发送数据卡在do循环里面。Pin脚是port22的0~3。