Designing High-Performance Video Systems with the AXI Interconnect
High-performance video systems can be created using Xilinx AXI IP. The use of AXI
Interconnect, Memory Interface Generator (MIG), and VDMA IP blocks can form the core of
video systems capable of handling multiple video streams and frame buffers sharing a common
DDR3 SDRAM memory. AXI is a standardized IP interface protocol based on the Advanced
Microcontroller Bus Architecture (AMBA®) specification. The AXI interfaces used in the
reference design consist of AXI4, AXI4-Lite, and AXI4-Stream interfaces as described in the
AMBA AXI4 spec ifications [Ref 1] . These interfaces provide a common IP interface protocol
framework to build the design around.
Together, the AXI interconnect and AXI MIG implement a high-bandwidth, multi-ported memory
controller (MPMC) for use in applications where multiple devices share a common memory
controller. This is a requirement in many video, embedded, and communications applications
where data from multiple sources moves through a common memory device, typically DDR3
SDRAM.