完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
我们可以做什么测试线性(INL)的12位SAR ADC与正弦信号源,只有10位DAC?
简单地说,如何提高10位DAC源的线性性能? 赞赏你的评论 谢谢 以上来自于百度翻译 以下为原文 What can we do to test linearity (INL) of 12bit SAR ADC with sinusoidal signal source which has only 10bit DAC ? Simply put how can i increase linearity performance of 10bit DAC source? Appriciate your comments Thanks |
|
相关推荐
16个回答
|
|
|
|
|
|
你有没有限制到一个10位DAC的原因?为什么不使用一个分辨率更高的(即使使用12位一个也会给你一个问题,即DACID本身可能不是线性的)。
你为什么要测试ADC的线性度呢? 以上来自于百度翻译 以下为原文 Is there a reason you are restricted to a 10 bit DAC? Why not using one with a higher resolution (even using 12-bit one will give you the problem that the DAC itself might not be linear). And what is the reason for you to test the linearity of the ADC at all? |
|
|
|
你可能想读Jim Williams关于这样的事情:CDS.Lo.Cn/DOCS/En/DeNo/DSOL11PDF
此外,你可以使用两个IDAC,一个是低电流,另一个是高电流,并将它们的输出结合起来。有一张白皮书可用: 以上来自于百度翻译 以下为原文 You might want to read Jim Williams on such a matter: cds.linear.com/docs/en/design-note/dsol11.pdf Also, you can use two IDACs, one with low current and the other one with high current, and combine their outputs. There is a white paper available: www.cypress.com/ |
|
|
|
使用抖动DAC组件作为一种可能性
HTTP://www. CyPress?COM/?RID=86073 HTTP://www. CyPress?COM/?RID=47478 问候,Dana。 以上来自于百度翻译 以下为原文 Use dithered dac component as one possibility - http://www.cypress.com/?rID=86073 http://www.cypress.com/?rID=47478 Regards, Dana. |
|
|
|
谢谢你
更多的质疑是否有可能通过任何简单的手段来提高DAC的线性度。 如果我们想使用10bit的源,并提高其SNR,那么我们可以只使用带通滤波器,然后缓冲区RYT? 用类似的方法,我们可以做任何事情来提高源的线性度,如果是的话,请简要解释一下。 以上来自于百度翻译 以下为原文 Thank you @hli Its more of query whether it is possible to improve linearity of DAC by any simple means. If we wanted to use 10bit source and improve its SNR then we could just use a bandpass filter followed by buffer ryt ? In a similar way is there anything we could do to improve linearity of source, if yes please explain briefly. |
|
|
|
以下可能有助于
http://www.类风湿/库/类比对话/档案/ 3906/章节% 205% 20测试%20转换器%20f.PDF 提高非线性?DOCID=32344 HTTP://CITESeRX.ist.pU.EdU/VIEWDOC/下载?DOI=1.1.1.48796&AMP Re= ReP1&Pype=PDF 问候,Dana。 以上来自于百度翻译 以下为原文 The following might assist - http://www.analog.com/library/analogdialogue/archives/39-06/Chapter%205%20Testing%20Converters%20F.pdf Improve non linearity http://www.cypress.com/?docID=32344 http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.48.7296&rep=rep1&type=pdf Regards, Dana. |
|
|
|
Yopor最初的问题是关于分辨率,而不是关于DAC的线性。所以现在我很困惑…
如果你想提高分辨率,看看Dana给你的文件。它们显示了多种方法来提高PSoC IDACs的分辨率达到12位。如果您需要更好的分辨率,可以将PWM作为DAC作为PSoCox建议。 如果你想提高DAC的线性度,问Dana,她知道她的东西:(比我好多了,我应该加……) 以上来自于百度翻译 以下为原文 Yopur original question was about resolution, not about linearity of the DAC. So now I'm confused... If you want to improve the resolution, look at the documents Dana I gave you. They show multiple ways to increase the resolution of the PSoC IDACs up to 12 bit. If you need better resolution, you can a PWM as DAC as PSoC73 suggested. If you want to improve the DACs linearity, ask Dana, she knows her stuff :) (Much better than I do, I should add...) |
|
|
|
如果你能有所启发,这可能是有用的。
1)需要的目标规格,DC,AC,温度,噪声…… 2)应用程序,什么是DAC输出用于 一个过滤器和缓冲器可以改善噪声性能,或者破坏它。 取决于您试图实现的规格以及如何实现 附加信号路径分量。当你接近更高性能时 非常微妙的影响导致越来越多的问题,比如交叉失真。 在R - R运算放大器的输入,业界不喜欢谈论… 问候,Dana。 以上来自于百度翻译 以下为原文 It might be useful if you could shed some light on - 1) Target specs needed, DC, AC, temp, noise...... 2) Application, what is the DAC output being used for A filter and buffer can improve noise performance, or destroy it, it all depends on specs you are trying to achieve and how you implement the additional signal path components. As you approach higher perfformance very subtle effects cause increasing problems, like the crossover distortion in the input of R-R OpAmps the industry does not like to talk about..... Regards, Dana. |
|
|
|
谢谢您。
我的问题是如何提高10位DAC的线性度,使之相当于一个12位DAC源。 我的源是有限的,我想添加一些外部电路,以提高其线性度,以便我可以测试ADC与此。所以问题是我应该添加什么外部电路来实现这个目的? 以上来自于百度翻译 以下为原文 thank you. @hli my question was how can i improve the linearity of 10 bit DAC such that it is equivalent to a 12bit DAC source. @dana application my source is limited and i would like add some external circuitry to improve its linearity so that i can test ADC with that. So the question is what external circuitary should i add to serve this purpose ? |
|
|
|
您的第一个问题,抖动,每个链接在线程的前面部分发布。
一种ToSAR测试方法,使用16位PWM与积分器(R-C网络)、DelSig读取PWM R—C输出,馈送SAR。既然DelSig好到20位,这反过来又保证你知道什么 V源(PWM)正在对SAR输出进行测量。我将使用读数的平均来消除 非相关噪声 问候,Dana。 以上来自于百度翻译 以下为原文 Your first question, dithering, per link posted in prior part of thread. One approach to SAR testing, use 16 bit PWM with integrator ( R-C network ), DelSig to read PWM output of R-C, and feed R-C to SAR. Since DelSig good to 20 bits, that in turn insures you know what the V source (PWM) is doing, and measure against SAR output. I would use averaging on readings to eliminate un-correlated noise. Regards, Dana. |
|
|
|
抓挠SAR测试评论在以前的帖子中,忘记没有Delsig
在PSoC 4中。 如果您使用16位PWM方法,并提供了VDD上的精度参考 部分,然后PWM实际上将成为一个精确的DAC。注意只有当你需要的时候 绝对准确度。如果你需要的只是相对的,没有必要做参考。PWM是 固有的蒙太奇,只有它的输出积分器,如果你使用运算放大器积分器VS 简单的C-C网络会影响蒙顿性。 问候,Dana。 以上来自于百度翻译 以下为原文 Scratch the SAR testing comment in prior post, forgot there is no DelSig in PSOC 4. If you used 16 bit PWM approach, and supplied a precision reference for Vdd on the part, then PWM would in effect become a precision DAC. Note this is only if you need absolute accuracy. If all you need is relative no reference is necessary. The PWM is inherently montonic, only its output integrator, if you used an OpAmp integrator vs the simple R-C network, would affect montonicity. Regards, Dana. |
|
|
|
谢谢达娜
你能提供任何示例项目文件,其中PWM是用DAC使用的。 以上来自于百度翻译 以下为原文 Thank you dana can you provide any sample project file in which PWM is used a DAC. |
|
|
|
你看过Dana给你的前两个链接吗?包含一个关于增加PSoC DAC分辨率的附加注释,甚至是一个完全抖动的VDAC(我不知道它作为完成的组件存在-谢谢指点我,Dana!)
以上来自于百度翻译 以下为原文 Did you look at the first two links Dana gave you? The contain an AppNote about increasing the resolution of the PSoC DACs, and even a complete dithered VDAC (which I didn't knew existed as finished component - thanks for pointing me to it, Dana!) |
|
|
|
放置PWM,然后控制它的占空比,当集成时
产生与DC成正比的直流输出。 附上一些计算滤波器组件的参考资料。 问候,Dana。 PWM滤波器 3.4兆字节 以上来自于百度翻译 以下为原文 Place a PWM, and then you control its duty cycle which when integrated yields a DC outoput directly proportional to DC. Attached some ref material for computing filter components. Regards, Dana.
|
|
|
|
“与直流直接成比例的直流输出。”
这可能在前面的文章中令人困惑,应该是 “产生与占空比成正比的直流输出。” 问候,Dana。 以上来自于百度翻译 以下为原文 "yields a DC outoput directly proportional to DC." That might be confusing in prior post, should be "yields a DC output directly proportional to Duty Cycle." Regards, Dana. |
|
|
|
|
|
|
|
只有小组成员才能发言,加入小组>>
756个成员聚集在这个小组
加入小组2129 浏览 1 评论
1871 浏览 1 评论
3687 浏览 1 评论
请问可以直接使用来自FX2LP固件的端点向主机FIFO写入数据吗?
1806 浏览 6 评论
1552 浏览 1 评论
CY8C4025LQI在程序中调用函数,通过示波器观察SCL引脚波形,无法将pin0.4(SCL)下拉是什么原因导致?
622浏览 2评论
CYUSB3065焊接到USB3.0 TYPE-B口的焊接触点就无法使用是什么原因导致的?
460浏览 2评论
CX3连接Camera修改分辨率之后,播放器无法播出camera的画面怎么解决?
455浏览 2评论
408浏览 2评论
使用stm32+cyw43438 wifi驱动whd,WHD驱动固件加载失败的原因?
1099浏览 2评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2025-1-24 00:19 , Processed in 1.323583 second(s), Total 105, Slave 89 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号