i2c slave没有发送确认位

大家好，我已经实现了i2c模块？
Spartan 6 FPGA用作主器件和CMOS omage传感器作为从器件。
我试图在Chipscope中可视化SCL和SDA信号以及输出i2c数据信号。
我相信我发送了正确的从站地址，但传感器没有确认。
在图中，我看到双向SDA信号和仅输出数据信号之间存在细微差别。
clk是25MHz的主时钟
rst是活跃的低点
从机确认时，ACK应始终为低电平。
scl_io是100KHz，这里我把它设置为1MHz只想显示2数据信号之间的差异（因为样本深度限制，我无法可视化整个i2c信号）。
在第二张图中，scl是100KHz
sda_io是biderectional位
sda_o是FPGA生成的数据信号
在约束.ucf文件中，无论我将sda位设置为i2c还是上拉它，都没有变化。
在硬件设备中，i2c总线直接连接到FPGA的引脚。
根据传感器数据表，SDATA通过1.5kΩ电阻上拉至VDD片外。
请你帮忙，谢谢！



以下为原文

Hi all, I've implemented an i2c module? The Spartan 6 FPGA works as master and CMOS omage sensors as slave. I tried to visualise the SCL and SDA signal and the output i2c data signal in Chipscope. I believe that I sent the right slave address but the sensor does not acknowledge.

In the picture, I see slight difference between the bidirectional SDA signal and the output only data signal.

clk is the master clock at 25MHz
rst is active low
ACK should be always low when the slave acknoledge.

scl_io is 100KHz, here I set it as 1MHz just want to show the difference between the 2 data signal(because of the sample depth limit, I can't visualize the whole i2c signal). In the 2nd picture, the scl is 100KHz
sda_io is the biderectional bit
sda_o is the data signal generated by FPGA

In the constraint .ucf file, no matter I set the sda bit as i2c or pullup it, there's no change.
in the hardware device, the i2c bus are directly connected to the pin of FPGA.  according to the Sensor datasheet, SDATA is pulled up to VDD off-chip by a 1.5kΩ resistor.

Could you pleas help me, thank you!