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我正在使用带有xilinx prom的串行菊花链作为链中的第一个设备,之后是2 xcs4000 FPGAs。 所有连接均按照数据表中的说明完成。 然而,fpgas没有被编程。 我试图在jtag模式下编程,在第一个fpga上的主串口和第二个上的从串口也在fpgas上使用slave serial,因为我的舞会是xcf16fp。 两个fpgas的完成引脚连接在一起并从外部拉起 init_b和prog_b也按照菊花链数据表中的说明连接 有关xilinx网站的数据表和视频讲座以及威廉希尔官方网站 支持所说的内容存在争议。 我想问下面的问题 1)我可以使用jtag来编程舞会和两个fpgas。 xilinx支持表示不可能完成必须分离但是数据表和讲座说它是可能的。 我很困惑.. 2)如果1想要编制来自舞会的fpgas我应该如何制作两个fpgas的msc文件? 3)是否可以在舞会中只编制1个foga,并保持另一个未编程 我正在上传原理图。 在完成的原理图中没有拉起来,但我把它从外部拉起来,这不是问题 以上来自于谷歌翻译 以下为原文 hey i am using a serial daisy chain with a xilinx prom as the first device in the chain and 2 xcs4000 fpgas afterwards. all connections are done as described in the data sheet. the fpgas are however not getting programmed. i have tried to program them in jtag mode,in master serial on 1st fpga and slave serial on 2nd also also with slave serial on both fpgas as my prom is xcf16fp. done pins of both fpgas are tied together and externally pulled up init_b and prog_b are also connected as given in the data sheet for daisy chaining there are some contentions in the data sheets and the video lecture on xilinx website and the what the technical support say. i would like to ask the following questions 1) Can i use jtag to program the prom and both fpgas.? xilinx support said it is not possible and done has to seperated however datasheet and lectures say that it is possible. i am confused.. 2) if 1 want to program both the fpgas from the prom how should i make the msc file for both fpgas? 3) is it possible to program only 1 foga in the chain from prom and keep the other one unprogrammed i am uploading the schematic . in the schematic done is not pulled up but i have pulled it up externally so that is not a problem |
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我已经将DONE引脚绑在一起,我无法将它们分开。
这是我的状态。 我用驱动程序完成编程fpga2 =否。 影响显示程序成功,但GWE和GTS均为零。 现在我用驱动完成=编程fpga1。 影响显示程序成功,GWE和GTS都等于1.因此fpga1是程序化程序,并且在chipcope和调试输出信号上工作。 现在我再次使用相同的位文件编程fpga2。 影响显示程序成功,GWE和GTS等于1.现在fpga2也被编程但是它没有显示对CHIPSCOPE的任何反应,核心被检测到但没有信号出现,它没有给出调试输出.. 我也以相反的顺序重复相同的过程,即程序fpga1 >> program fpga2 >> program fpga1 ... 结果是相同的!!!!!!!!!!!!!! 以上来自于谷歌翻译 以下为原文 I already have DONE pins tied together and i cannot seperate them. here is my status. i program fpga2 with drive done = no. impact shows program successfull but GWE and GTS are both zero. Now i program fpga1 with drive done = no. impact shows program successful and both GWE and GTS equal to 1. so fpga1 is actaully programmmed and is working both on chipscope and giving debug output signals. Now i again program fpga2 with the same bit file. impact shows program successful and both GWE and GTS equal to 1. Now fpga2 is also programmed BUT IT DOESNOT SHOW ANY RESPONSE ON CHIPSCOPE , THE CORE IS DETECTED BUT NO SIGNALLING APPEARS, NEITHER IT GIVES DEBUG OUTPUTS.. i repeat the same process in the reverse order also i.e program fpga1>>program fpga2>>program fpga1... the results are exaclty the same!!!!!!!!!!!!!! |
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