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在阅读了关于新推出的隔离设计流程和可信路由威廉希尔官方网站 的xapp1086后,出现了一些问题。 将控制路径(例如加热器控制)和保护路径(例如温度监控)集成到同一芯片(比如说Zynq)并实现单一误差容限当然是很好的。 但是,控制系统和保护系统必须是独立的,如果电源是共用的,则情况并非如此。 在这种单芯片实现中,您如何处理过压/欠压瞬态或EMC / ESD易感性? 我们可以借鉴哪些参考设计? Maurizio Bianconi 以上来自于谷歌翻译 以下为原文 Hello, after reading xapp1086 about the newly introduced Isolation Design Flow and Trusted Routing technology, a few questions have popped up. It would be certainly nice to integrate the control path (e.g. heater control) and protection path (e.g. temperature supervision) into the same chip (let's say a Zynq) and achieve single error tolerance. However, the control system and the protection system are required to be independent, which seems not to be the case, if the power supplies are shared. How do you go about supply overvoltage/undervoltage transients or EMC/ESD susceptibility in such single-chip implementations? Are there any reference designs we can draw on? Maurizio Bianconi |
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男,
根据标准,单个芯片可能无法作为解决方案。 Zynq确实为ARM处理器系统和可编程逻辑提供单独的电源,因此可以实现独立控制器,一个在可编程逻辑中,一个在处理器中,但消除所有单点故障可能仍然是一个挑战(如何做 你结合,或选择使用哪个控制器?)。 而且,如果失败不是一种选择,则无论如何都需要冗余。 http://forums.xilinx.com/t5/PLD-Blog/Designing-Failsafe-Systems/ba-p/255976 隔离设计流程只是工具箱中的一个工具,它本身并不足以满足所有要求。 它确实验证了可编程逻辑中运行的两个设计是否正确分离(不共享资源,物理隔离)。 正如您所指出的那样,这只是解决方案的一部分。 至于EMC / ESD,您必须通过适当的屏蔽和接地来解决这个问题(即:您必须拥有法拉第笼)。 EMC / ESD与您使用Xilinx器件的方式无关,也与您的封装解决方案无关 - 无论是否有任何设备,如果屏蔽不当,它们都易受EMC / ESD的影响! Austin Lesea主要工程师Xilinx San Jose 以上来自于谷歌翻译 以下为原文 m, Depending on the standard, a single chip may not be possible as a solution. Zynq does offer separate power for the ARM processor system, and the programmable logic, so it is possible to implement independent controllers, one in programmable logic, one in the processor, but eliminating all single points of failure may still be a challenge (how do you combine, or choose which controller to use?). And, if failure is not an option, redundancy is required, regardless. http://forums.xilinx.com/t5/PLD-Blog/Designing-Failsafe-Systems/ba-p/255976 The isolated design flow is but one tool in the toolbox, it is not sufficient in and of itself to meet all requirements. It does verify that two designs running in the programmable logic are properly separated (share no resources, are physically isolated). As you point out, that is but one part of the solution. As for EMC/ESD, that is something you have to solve by proper shielding and grounding (ie: you must have a Faraday cage). EMC/ESD has nothing to do with how you use the Xilinx part, and everything to do with your packaging solution -- regardless of anyone's devices, they are all susceptible to EMC/ESD if they are improperly shielded! Austin Lesea Principal Engineer Xilinx San Jose |
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