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当设备没有电源或启动之前,PIC上的I/O端口的行为是什么?我使用的是PIC12F1501,我还没有在数据表中看到它,但是我可能已经错过了。更详细一些:在我的应用程序中,VDD在最初的电源上缓慢上升,比如说几分钟的时间。在Vdd稳定后,我可以使用MCLR来重置设备,但我想知道I/O引脚会做什么直到那个点。我有两个引脚配置为输出,从一些台架测试看,它们看起来一直保持低,但我不知道我是否可以指望。谢谢帮助。
以上来自于百度翻译 以下为原文 Is the behavior of the I/O ports on a PIC specified when the device is unpowered or before it boots? I'm using a PIC12F1501 and I haven't seen it specified in the datasheet, but I may have missed it. For a little more detail: In my application, Vdd rises slowly on the initial power up, say over the course of a few minutes. I can reset the device using MCLR after Vdd has stabilized, but I'm wondering what the I/O pins will do up until that point. I've got a couple pins configured as outputs, and from doing some bench testing it looks like they are consistently held low, but I don't know if I can count on that. Thanks for the help. |
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7个回答
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该芯片应保持在复位直到BOR达到(我希望您启用它)引脚将作为输入,直到BOR阈值。与OU-BOR PIC将尝试运行,但因为它是超出规格,它可以运行野生。
以上来自于百度翻译 以下为原文 The chip should be held in reset until BOR is reached (I hope you enabled it) The Pins will be held as inputs untill the BOR threshold. with out BOR the PIC will try to run, but since it is out of spec , it could run wild. |
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谢谢你的回复。你知道一个文件,说明引脚将作为输入持有?这是有意义的,但是有一份文件可以供将来参考。这是一个很好的例子。在其他几点上:我已经启用BOR了,但是谢谢你的检查。-我没有看到任何解决这个特定问题的方法。
以上来自于百度翻译 以下为原文 Thanks for the replies. Do you know of a document that describes that the pins will be held as inputs? It makes sense, but it would be nice to have that document for future reference. To follow up on a couple other points: - I do have BOR enabled, but thanks for checking. - I didn't see anything addressing this specific issue in TB3009. |
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该文档是您的PIC的数据表。列出了引脚的复位条件。以及复位过程中的行为。
以上来自于百度翻译 以下为原文 The Document is the Data sheet for you PIC. The Reset condition for the pins is listed. And the Behavior during Reset. |
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如果您查看设备的数据表,I/O端口部分中的TIS寄存器的寄存器描述应该表明它们默认为POR/BOR条件下的输入。您能实现一个监视电路,保持PIC复位,直到VDD上升到指定的水平吗?
以上来自于百度翻译 以下为原文 If you look at the data sheet for the device, the register descriptions for the TRIS registers in the I/O Ports section should show that they default to inputs on POR/BOR conditions. Could you implement a supervisor circuit that holds the PIC in reset until Vdd rises to a specified level? |
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像一个棕色的重置?(BOR)芯片内部有一个。如果不是所有的新图片,大多数(大多数是旧的)。
以上来自于百度翻译 以下为原文 Like a Brown Out Reset? (BOR) The Chip has an internal one. Most if not all New PICs do.( and Most Old ones) |
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我在数据表中找到了重置条件,谢谢。对不起,我以前没有注意到。顺便说一下,我注意到ANSA位的复位条件也对具有模拟功能的引脚设置高,这意味着那些引脚被设置为复位时的模拟输入。关于缓慢上升VDD和复位的问题:-根据AN607C(2014)第9页,NKU。RZMAN是正确的,BOR可以用来解决一个缓慢上升的VDD问题。然而,在实践中,我发现我必须确保我使用Bor(可配置BRV位)的更高电压阈值,以便在我的应用程序中可靠地工作。-该文件的早期版本,AN607B(1997)页1,建议保持MCLR低,直到适当的VDD已经恢复。切克,就像科尔建议的那样。然而,在大多数设备具有BOR功能之前,这个版本被释放了。作为备份,我还将配置MCLR引脚作为复位,因此,如果我真的需要,我可以将PIN接地,以便在电源建立后重置该设备。
以上来自于百度翻译 以下为原文 I found the reset conditions in the datasheet; thanks. Sorry I missed that before. By the way, I noticed that the reset condition for the ANSA bits are also set high for pins that have analog functionality, meaning that those pins are set as analog inputs on reset. Regarding the issue of slowly rising Vdd and reset: - According to AN607C (2014) page 9, NKurzman is correct that BOR can be used to solve the problem of a slowly rising Vdd. In practice though, I found that I had to make sure I was using the higher voltage threshold for BOR (configurable with BORV bit) for this to work reliably in my application. - An earlier version of that document, AN607B (1997) page 1, recommends holding MCLR low until an appropriate Vdd has been reached, just as t.kerr suggested. However, this version of the document was released before most devices has BOR functionality. - As a backup, I'm also going to configure the MCLR pin to act as a reset, so if I really need to I can short that pin to ground to reset the device once power has been established. |
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确保你同时拥有BOR和LPBO。我使用PIC16F1703在一个非常缓慢上升的电源(3V太阳能电池),我得到可靠的复位每次。12F1501具有相同的熄灭机制。
以上来自于百度翻译 以下为原文 Make sure you have both BOR and LPBOR enabled. I'm using a PIC16F1703 on a very slow rising supply (3v solar cell) and I'm getting reliable resets every time. The 12F1501 has the same Brownout mechanisms. |
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