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我只是想问一下,如果我们可以直接使用EZ-USB FX3的GPIO到FPGATYPE交替循环,而不使用HSMC互连板(直接连接引脚),这会影响传输速率吗? 谢谢你的帮助 以上来自于百度翻译 以下为原文 Happy new year to you all, I just wanted to ask if we can plug directly the GPIO of the EZ USB FX3 to an FPGA Type Altera Cyclone IV without using a HSMC interconnect board ( just connect directly the pins ) and would that affect the transfer rate ? Thank you in advance for your help |
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我堵用顶销和电线跟这些超高速浏览器工具:10cm长度http://cloud6.lbox.me/images/384x384/201211/40p-dupont-jumper-wire-cable-line-1p-1p-pines-21-5cm_bazbaf1354250200243.jpg和很好的工作在频率高达65MHz(Max我测试)。使用Altera公司的销策划和LVTTL 3.3V 4ma驱动强度(务必设置跳线的总管板3.3V以及)。在8ma驱动强度的线有太多的干扰,另一个在30mhz >。
以上来自于百度翻译 以下为原文 I'm plugging in the SuperSpeed Explorer kit using the top pins and wires like these: http://cloud6.lbox.me/images/384x384/201211/40p-dupont-jumper-wire-cable-line-1p-1p-pines-21-5cm_bazbaf1354250200243.jpg of 10cm length and it works fine at frequencies up to 65MHz (max i tested). Using 3.3v LVTTL and 4mA drive strength in altera pin planner (make sure to set jumper on explorer board to 3.3v as well). At 8mA drive strength the wires had too much interference from one another at >30MHz. |
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好的,但是我可以直接连接到下面的照片中吗?(实际上我正在使用DE0纳米旋风IV FPGA,它的尺寸与EZ USB FX3套件的大小一样,所以我想直接连接它们)
但在我应该使用你给我看的电线的情况下,我应该把哪一个引脚连接到哪一个引脚上? 我刚开始使用FPGA,我不知道如何连接它们。 非常感谢你 以上来自于百度翻译 以下为原文 okay, but could I connect directly like in the photo below ( I am actually working with a De0 Nano Cyclone IV FPGA and it has the same size as the EZ USB FX3 kit so I wanted to connect them directly) But in the case where I should use the wires you showed me, I should connect which pin to which pin ? I'm just getting started with the FPGA and I don't know how to connect them Thank you very much |
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这就是我想把FX3连接到FPGA的方法。
以上来自于百度翻译 以下为原文 this is how I want to connect the FX3 to the FPGA |
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您将不得不查看DE0示意图,并了解如何暴露引脚映射到FPGA包。
然后找到合适的连接到DQ(31…0)和CTL(15…0)以及PCLK(例如,您可能希望PCLK输出PLL)。 我怀疑你可以只使用一个带状电缆/直接的男性-女性交配连接,因为一些在超级探险家的引脚是5V电源引脚,这将破坏您的FPGA如果连接到,有些是GND,您应该连接到相应的GND引脚(您可能能够逃脱B)Y连接到FPGA上的IO引脚,如果你用完GND管脚,只需确保将FPGA上的IO引脚设置为输出,并在其上驱动0个IO引脚 以上来自于百度翻译 以下为原文 You will have to look at the DE0 schematic and see how the exposed pins map to the FPGA package. Then find the appropriate ones to connect to DQ[31..0] and CTL[15..0] as well as PCLK (you might want PCLK to be output of a PLL, for example). I doubt you can just use a ribbon cable/direct male to female mating to connect, because some of the pins on the superspeed explorer are 5V power pins, which will DESTROY your fpga if connected to, and some are GND, which you should connect to corresponding GND pins (you might be able to get away by connecting them to IO pins on the FPGA if you run out of GND pins, just make sure to set those IO pins on the FPGA to output, and drive a 0 on them) |
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