PC通过PCI访问EMIF CE3的地址0xb0100200时无法读取该位置的值

从这个地址转换关系图来看，还有个PCIBARn寄存器的配置与之相关

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Tony，您好，
    非常感谢您的回答 。从文档SPRUE60B 第13章来看，PCIBARn寄存器属于PCI Configuration Registers组，请问PCIBARn的基地址是什么？如何查看和更新，谢谢。
   

12.1 Programming the PCI Configuration Space Registers
Configuration space registers can be programmed both from the external PCI host and DSP. Normally,
the PCI host programs a part of configuration space registers and DSP programs the remaining part.
A PCI host can control modes and options in PCI by programming the configuration space registers. For
example, the PCI host can program the Command/Status register (PCICSR) to enable PCI bus master
capability for the DSP and to enable the memory access to DSP. It can program the Base Address
Registers (PCIBAR0 to PCIBAR5) to map the DSP memory regions into PCI address space.
The PCI host can access the configuration space registers by performing a TYPE 0 access in the PCI
bus.
The DSP needs to program a set of registers in the configuration space before the PCI host system
software scans the PCI, as part of enumerating the PCI devices. For example, it needs to program Vendor
ID/Device ID (PCIVENDEV) and Class Code/Revision ID registers (PCICLREV) so that the PCI host
system software can identify the device and load the respective host driver if required. This can be done
automatically using the I2C EEPROM initialization method, as described in Section 12.4.
The DSP cannot access the configuration space registers directly. To facilitate access to the configuration
space registers, mirror registers are supported. Updating the mirror registers updates the corresponding
configuration space registers.


Base Address n Mirror Register (PCIBARnMIR)
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Tony，您好，
    通过查看PCI 的mirror寄存器得知，PCIBAR4 = 0xF0800008；上位机访问的地址为0xF0900200；根据转换图，可以得出DSP地址为0xB0100200这个我们需要访问的地址，但是上位机读该地址获得的值是0，请问该如何进一步检查该问题？

本身这个地址的内容是多少？CE3上接的是什么？
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本身0xB0100200这个地址上存放的是一个全部变量的值为17；EMIF整个接口和FPGA相连接；CE3 被设置为16 bit同步模式。CE5也是16 bit同步模式。

在CCS里memory view能看到这个地址的正确值吗？
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问题已经解决，是对应的FPGA EMIF配置有问题，谢谢。