谢谢大家的友好讨论。让我解释一下我们的产品做了什么,也许这个小组可以提供一些关于我正在尝试做的建议。我们使用18F2685的板基本上是一个智能USB到多协议接口。(智能的意义上,它使用另一个设备使用底层协议,而不仅仅是一个协议转换器)它支持CAN(所以我需要一个CAN控制器在板上,2685个有)RS-485,RS-232,K线(可变比特率从9600到57 K),1-Wire(主从两个,哪一个?是具有挑战性的,以及在基本的串行物理层和CAN物理层上运行的几个自定义协议。在软件中,我综合了所有协议(不包括CAN,并且不包括我们使用USART的FTDI USB芯片的PIC接口)。这是一个具有特定噪声分布的非常嘈杂的环境,所以在协议波形中,我对每个比特内的多个点进行了多个轮询,并且有一些逻辑来确定线路是真正的HI还是低,通过比较多个轮询。因为我有点敲打一切,时间是至关重要的。当我最初创建设计(在2008)时,来自微芯片的免费编译器对于关键时序来说是非常不可用的。不仅函数中的时间不可预测,函数的调用也产生了不同的定时,除了代码臃肿的事实之外。(它根本不是为关键时序应用而设计的)我开始在汇编中编写所有的位敲击代码,然后试用高科技C编译器。真是天赐良机!它不仅导致超薄代码,时间是超级可预测的和可靠的。我看了一些我已经在汇编程序中写的函数,和由高科技创建的汇编程序,它们编译的代码比我写的代码要紧凑。我把微型芯片“高科技”当两个不同的微芯片编译器集成在一起时,我的意思是“杀掉”高科技。取代它的人,他们把它弄坏了。当时所有的编译器都无法使用。(我从2011年左右就没有尝试过任何东西,我们只使用了V965版本,因为在随后的版本中发生了故障)他们似乎失去了高科技的魔力。这就是我所要做的。我想主要的问题是,Microchip是否已经在编写编译器方面取得了更好的效果,特别是在这种类型的应用程序中,紧密的可重复的时序。如有任何反馈,将不胜感激。
以上来自于百度翻译
以下为原文
Thanks all for the good discussion. Let me explain what our product does so maybe the group can offer some advice relative to what I am trying to do.
Our board that uses the 18F2685 is basically a smart USB to multiple protocol interface. (smart in the sense that it does functions to another device using the underlying protocol, not simply a protocol translator) It supports CAN (so I need a CAN controller on board, which the 2685 has) RS-485, RS-232, K-line (variable bit rates from 9600 to 57K), 1-wire (both Master and Slave, which is challenging) and several custom protocols running over both the basic serial physical layer as well as over the CAN physical layer.
I synthesize all protocols in software, (excluding CAN, and excluding the PIC interface to the FTDI USB chip we use, which I use the USART). It is a really noisy environment with specific noise profiles, so in the protocol waveforms I do a lot of multiple polling of the lines over several points within each bit and have some logic to determine if the line is truly hi or low with comparisons of the several polls. Since I am bit-banging everything, timing is crucial.
When I originally created the design (in 2008) , the free compiler from Microchip was horribly unusable for critical timing. Not only was timing unpredictable within a function, calls to functions yielded different timing, besides the fact that the code was bloated. (It simply was not designed for critical timing applications) I started writing all of the bit-banging code in assembly, then tried out the Hi Tech C compiler. It was a godsend! Not only did it result in super slim code, the timing was super predictable and reliable. I looked at some of the functions I had already written in assembler vs the assembly created by Hi Tech, and their compiled code was more compact than what I had written.
What I meant by Microchip "killing off" Hi Tech, when they integrated the Hi-Tech stuff into the two different Microchip compilers that replaced it, they broke it. All the compilers at the time became unusable. (I haven't tried anything they have put out since about 2011 or so, and we have only used the V9.65 version as the breaking happened in the subsequent versions) It seemed they lost the Hi Tech mojo.
So that is what I am looking to do. I guess the main question is if Microchip has gotten any better at writing compilers, especially with respect to tight repeatable timing in this type of application. Any feedback would be most appreciated.