PIC32 I2C通信协议与PCA9685

a）你用示波器（SCL，SDA）检查信号是否匹配数据表中的每一个波形可以帮助了解协议失败的地方。B）检查SCL数据包，一些芯片的最大BPS低于MCU（400 KbPs，100KbPs，慢）。C）在SDA上有适当的上拉（和）SCL，如果SCL不被推挤为MCU驱动），确保拉引线适合于DATARATE，即4K7在400 KbPs，可能在较低数据量上更高。我刚刚开始测试一个MDSIM DS323 2MZ+RTC到PIC32 MZ今天，之后我将了解更多关于和谐和I2C。保罗。



      以下为原文

    a) Did you check signals with oscilloscope (SCL, SDA)
Matching each bit to waveforms in datasheet can help see where there protocol is failing.
b) Check SCL datarate, some chips have a maximum bps that is lower than the MCU (400Kbps, 100Kbps, slower).
c) Do you have appropriate pullups on SDA (and on SCL if SCL isn't driven as Push-Pull by MCU)
Ensure the pullups are appropriate for the datarate, i.e. 4K7 at 400Kbps, possible higher at lower datarates.
 
I'm just starting to test a Maxim DS3232MZ+ RTC to a PIC32MZ today, after that I'll know more about Harmony and I2C.
 
Paul

我在汇编代码，所以我不知道你的代码有什么问题。然而，看着波形，我看到了一些看起来不正确的东西。首先，如果您使用的是0x40的默认地址，那么您应该为写入操作发送0x80（写入位为零）。第二，我不看到I2C开始位应该是SCL高，然后过渡SDA从高到低。这就是我在汇编中如何做到的：I2CSTART BSF-SDA；启动条件是高到低；SDA的转换，而SCL是高BSF的SCL NOP BCF SDA NOP BCF SCL NOP；离开SDA和SCL低回报。



      以下为原文

    I code in assembly so I'm not sure what's wrong with your code.  However, looking at the waveform I see a couple of things that don't look correct.  First, if you are using the default address of 0x40, then you should send 0x80 for a write operation (write bit is zero).  Second, I don't see the I2C start bit which should be SCL high and then transition SDA from high to low.  This is how I do it in assembly:
 
i2cstart BSF     SDA       ;The start condition is a high to low
                                   ;transition of SDA while SCL is high
            BSF     SCL
            NOP
            BCF     SDA
            NOP
            BCF     SCL
            NOP                  ;Leave SDA and SCL low
            RETURN

嗨，示波器图像显示：（开始）0，1，0，0，0，0，0，0，1（停止），这意味着：（start）0x40（NACK）（停止）字节值0x40意味着：I2C 7位地址＝0x20，和R/W比特＝0。当I2C地址错误时，从设备将不识别信号，而不响应。SDA线将高，与WHE相同。总线是空闲的。在I2C设备地址和函数调用文档的规范中，这是一个重复的问题，I2C地址值是指在0到127范围内的7位值，还是在R/W位位置的虚拟位中的0位到254位的8位值：0位T中的10位I2C地址。HRU 1023。即使NXP在PCA9685第7.1章的数据表中也不完全是如此，尽管它们非常小心地将地址显示为图形，或值为位模式：1000为PCA9685默认地址000，7位PCA9685导致所有呼叫地址（1110 000），7位：（E0H或1110 000 x），8位，一些线路。Microchip一致地将数据表中的位字段和类似文档的值作为子字段的值，而不是复合控件或状态寄存器中的值。此外，在软件文档中，微芯片似乎遵循相同的实践，除了和声，似乎期望7Bi。T 2C地址是一个8位的值与虚拟R/W位！迈西尔



      以下为原文

    Hi,
Oscilloscope image show: (Start) 0 1 0 0 0 0 0 0 1 (Stop),
which means: (Start) 0x40 (NACK)(Stop)
The byte value 0x40 means: I2C 7-bit address = 0x20, and  R/W bit = 0.
 
When I2C address is wrong, then slave device will not recognize the signal, and not respond.
SDA line will then be high, same as when the bus is idle.
 
It is a repeating problem in specification of I2C device address and function call documentation,
whether I2C address value means:   7-bit value in the range 0 thru 127,
or: 8-bit value in the range 0 thru 254 with a dummy bit in the R/W bit position
or: 10 bit I2C address in range 0 thru 1023.
 
Even NXP isn't fully consequent in datasheet for PCA9685 chapter 7.1
although they very carefully show address as graphics, or values as bit patterns like:
    1000 000     for PCA9685 default address, 7 bit
or PCA9685 LED All Call address (1110 000), 7 bit
but: (E0h or 1110 000X), 8 bit, some lines further down.
 
Microchip consistently document values of bitfields in datasheet and similar documents as values of the subfield,
not as value in a composite control or status register.
Also in software documentation, Microchip seem to follow the same practice,
Except Harmony, which seem to expect 7-bit I2C address to be a 8-bit value with a dummy R/W bit!
 
   Mysil

应该有10个时钟脉冲，但只有9个。没有启动位。我捕捉到了它应该是什么样子。靠近末端的短脉冲是我切换端口方向的地方，这样我就可以从奴隶那里读取确认信息。



      以下为原文

    There should be 10 clock pulses but there are only 9.  There is no start bit.  I captured what it should look like.  The short pulses near the end are where I switch the port direction so that I can actually read the acknowledge from the slave.
 
 
 
 
   Attached Image(s)

垃圾。正如MysIL所言，OP的捕获完全正确。事实上，它看起来比你的好很多。编辑：-BTW在I2C中没有一个“开始位”。有一个启动条件，SDA随SCL高而下降。



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Rubbish. The OP's capture is perfectly ok as Mysil stated. In fact it looks much better than yours.
 
Edit:- BTW there is no such thing as a 'start bit' in I2C. There is a start condition, which is SDA falling with SCL high.

我相信SCL通常应该是高的，并且在SCL开始之前SDA开始变低。I2C交易开始时，您的图片不正常，尽管可能会起作用。OP的图片显示了一个合适的启动条件。



      以下为原文

   
I believe SCL should normally be high, and for a start SDA goes low before SCL does. Your picture is not normal for the beginning of an I2C transaction, although it may work. The OP's picture shows a proper start condition.

启动位或启动条件-这是语义的问题。如果你看一下SCL/SDA波形，你就会发现它们符合正确的时机。我的看起来是这样的，因为我在装配中有点笨拙，而不是使用内置在图片中的I2C HW。哦，它的工作只是精细地连接到五个完全不同的I2C设备。也许OP只需要将他的地址字节改为0x80来与PIC32中的H2I2C一起工作。



      以下为原文

    Start bit or start condition - it's a matter of semantics.  If you look at the SCL/SDA waveforms you see that they meet the proper timing.  Mine looks like it does because I'm doing bit banging in assembly and not using I2C HW built into a PIC.  Oh, and it works just fine interfacing to five completely different I2C devices.  Maybe the OP only needs to change his address byte to 0x80 to work with the HW I2C in the PIC32.