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pci e电路板设计规范(内部资料)
pci express board design guidelines
1. Physical Interconnect Layout Design................................................ 51.1 Introduction ........................................................................................................ 51.2 Topology and Interconnect Overview .............................................................. 51.2.1 Card Interoperability ............................................................................................... 71.2.2 Bowtie Topology Considerations ............................................................................ 71.2.2.1 Lane Polarity Inversion.................................................................................................... 81.2.2.2 Lane Reversal and Width Negotiation ............................................................................. 81.3 Physical Layout Design Constraints............................................................... 111.3.1 PCB Stackup.......................................................................................................... 111.3.1.1 Desktop System Board and Add-in Card (4-layer) Stackup .......................................... 121.3.1.2 Server, Workstation and Mobile (6-layer, 8-layer and 10-layer) Stackups.................... 151.3.1.3 Add-in Card and Mobile (6-layer) Stackup ................................................................... 161.3.2 PCB Trace and Other Element Considerations ..................................................... 171.3.2.1 Differential Pair Width and Spacing Impacts ................................................................ 201.3.2.2 Differential Pair Length Restrictions and Budgets ........................................................ 231.3.2.3 Length Matching............................................................................................................ 241.3.2.4 Reference Planes............................................................................................................ 251.3.2.5 Breakout Area Specific Routing Guidelines .................................................................. 271.3.2.6 Edge Finger Design: Add-in Card ................................................................................. 291.3.2.7 Via Usage and Placement .............................................................................................. 301.3.2.8 Bends ............................................................................................................................. 321.3.2.9 Test Points and Probing ................................................................................................. 351.3.3 PCI Express Topologies ........................................................................................ 351.3.3.1 Interconnect Topologies for Two Components on the Baseboard ................................. 361.3.3.2 Interconnect Topologies for Baseboard with Add-in Card ............................................ 371.3.4 Passive Components and Connectors .................................................................... 381.3.4.1 AC Coupling Capacitors ................................................................................................ 381.3.4.2 Connectors ..................................................................................................................... 401.4 Summary........................................................................................................... 41
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